1. Technical Field
The present inventions relate to memory devices that provide read data from different banks.
2. Background Art
Various arrangements for memory devices in a memory system have been proposed. For example, in a traditional synchronous dynamic random access memory (DRAM) system, memory devices communicate data through bidirectional data buses and receive commands and addresses through command and addresses buses. In some implementations, the memory devices have stubs that connect to the buses in a multi-drop configuration. Other designs include point-to-point signaling. Bidirectional signaling may be sequential or simultaneous.
Many memory devices have more than one memory bank. Each bank is a section of memory that can be accessed separately from the other banks. In typical DRAM memory devices, as one bank is being read another bank may be written to, or another bank may be prepared for later reading or writing. However, two banks are written to or not read from at the same time. The memory cells of the banks are typically accessed through rows (sometimes called word lines (WL)) and columns.
Over the years, with new generations of memory devices, a read operation (such as a prefetch operation) has involved an increasingly larger number of bits being read from a bank. For example, with Double Data Rate DDR SDRAM memories, 16 bits are read from a bank at a time. In DDR2 memories, 32 bits are read from a bank at a time. In DDR3 memories, there may be 64 bits of data read from a bank at a time. Under the current approach, the number of read data bits will keep doubling leading to an increase in chip (die) size.
Some memory chips may be used as either X4 devices (four DQ data pads) or X8 devices (eight DQ data pads). If the chip is used as a X8 device, then all eight of the DQ pads are used. If the chip is used as a X4 device, then four of the DQ pads are not used. There are also X16 memory chips, but they have a substantially larger die and associated package.
Memory modules include a substrate on which a number of memory devices are placed. The memory devices may be placed on only one side of the substrate or on both sides of the substrate. In some systems, a buffer is also placed on the substrate. For at least some signals, the buffer interfaces between the memory controller (or another buffer) and the memory devices on the module. In such a buffered system, the memory controller can use different signaling (for example, frequency and voltage values, and point-to-point versus a multi-drop arrangement) with the buffer than the buffer uses with the memory devices. A dual in-line memory module (DIMM) is an example of a memory module. Multiple modules may be in series and/or parallel. In some memory systems, a memory device receives signals and repeats them to a next memory device in a series of two or more memory devices.
Memory controllers have been used in chipset hubs and in a chip that includes a processor core. Some computer systems include wireless transmitter and receiver circuits.